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Development of high-resolution shadow masks using thin membranes of parylene-C for patterning microelectronic devices
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In order to fabricate microelectronic devices, patterning techniques such as photolithography
or shadow mask patterning must be performed. This last technique uses a physical
mask to block regions on the substrate during film deposition and its resolution is determined
by the thickness of the mask and the fabrication procedures. This thesis reports
the fabrication of Parylene-C thin shadow masks, 3 and 5 m, and their application in
single-step and multi-step patterning and, on curved surfaces. The results for single-step
patterning showed the possibility of defining features with a resolution of 10 m. When
multi-step patterning the maximum resolution obtained in the produced masks was 20
m for separation between features and 40 m for lines where this resolution was limited
by the photolithographic masks used. For the alignment, several strategies were tested
but the one that presented the best results was the use of SU-8 pillars to align different
shadow masks in order to pattern microelectronic devices with 10 m of tolerance.
The produced shadow masks sets for TFT patterning were only one used one time and
maintained the same yield from before patterning. For fiber patterning, the obtained
results are promising since it showed the possibility of patterning in a curved surface
using a simpler and low-cost technique. It was possible to deposit three material layers
to fabricate a capacitor. It was possible to pattern a circle of 1 mm in diameter on a fiber
with 750 m of diameter. This work allowed to fabricate ultra-thin masks in Parylene
producing features of high resolution and features on curved surfaces showing how this
material can be used as a complement in microelectronic device fabrication.
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Parylene-C Shadow Mask Microelectronic devices Alignment