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Land Cover Classification Implemented in FPGA
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The main focus of the dissertation is Land Use/Land Cover Classification, implemented
in FPGA, taking advantage of its parallelism, improving time between mathematical
operations. The classifiers implemented will be Decision Tree and Minimum Distance
reviewed in State of the Art Chapter. The results obtained pretend to contribute in fire
prevention and fire combat, due to the information they extract about the fields where
the implementation is applied to.
The region of interest will Sado estuary, with future application to Mação, Santarém,
inserted in FORESTER project, that had a lot of its area burnt in 2017 fires. Also, the data
acquired from the implementation can help to update the previous land classification of
the region.
Image processing can be performed in a variety of platforms, such as CPU, GPU and
FPGAs, with different advantages and disadvantages for each one. Image processing can
be referred as massive data processing data in a visual context, due to its large amount of
information per photo.
Several studies had been made in accelerate classification techniques in hardware, but
not so many have been applied in the same context of this dissertation. The outcome of
this work shows the advantages of high data processing in hardware, in time and accuracy
aspects.
How the classifiers handle the region of study and can right classify it will be seen in
this dissertation and the major advantages of accelerating some parts or the full classifier
in hardware. The results of implementing the classifiers in hardware, done in the Zynq
UltraScale+ MPSoC board, will be compared against the equivalent CPU implementation.
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Accuracy Performance Land Use/Land Cover Classifier CPU GPU FPGA