Publicação
Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool
| dc.contributor.author | Sniatala, P. | |
| dc.contributor.author | Naumowicz, M. | |
| dc.contributor.author | Handkiewicz, A. | |
| dc.contributor.author | Szczesny, S. | |
| dc.contributor.author | De Melo, João L A | |
| dc.contributor.author | Paulino, Nuno Filipe Silva Veríssimo | |
| dc.contributor.author | Goes, João Carlos da Palma | |
| dc.contributor.institution | CTS - Centro de Tecnologia e Sistemas | |
| dc.contributor.institution | UNINOVA-Instituto de Desenvolvimento de Novas Tecnologias | |
| dc.contributor.pbl | Polska Akademia Nauk | |
| dc.date.accessioned | 2017-05-30T14:02:12Z | |
| dc.date.available | 2017-05-30T14:02:12Z | |
| dc.date.issued | 2015 | |
| dc.description.abstract | The paper presents a second order current mode sigma-delta modulator designed with the help of a new elaborated tool to optimize the transistor sizes. The circuit is composed of two continuous time loop filters, a current comparator and a one bit DAC with a current output. The resulting circuit, designed in a 65 nm 1.2 V CMOS technology, has a bandwidth of 2 MHz for a clock frequency of 250 MHz. The electrical simulation results show that it achieves a maximum signal-to-noise-plus-distortion ratio (SNDR) of 53.6 dB while dissipating 93 mu W, which corresponds to an efficiency of 59.7 fJ/conv. The fully current mode structure makes the circuit suitable to be applied in a current mode signal processing like biosensors or image pixels arrays. | en |
| dc.description.version | publishersversion | |
| dc.description.version | published | |
| dc.format.extent | 1130401 | |
| dc.identifier.doi | 10.1515/bpasts-2015-0104 | |
| dc.identifier.issn | 0239-7528 | |
| dc.identifier.other | PURE: 1422779 | |
| dc.identifier.other | PURE UUID: 55be2714-3c70-4394-8b0a-5c5196f7aa07 | |
| dc.identifier.other | Scopus: 84962129203 | |
| dc.identifier.other | WOS: 000369407700011 | |
| dc.identifier.uri | https://www.degruyter.com/view/j/bpasts.2015.63.issue-4/bpasts-2015-0104/bpasts-2015-0104.xml | |
| dc.identifier.url | https://www.degruyter.com/view/j/bpasts.2015.63.issue-4/bpasts-2015-0104/bpasts-2015-0104.xml | |
| dc.language.iso | eng | |
| dc.peerreviewed | yes | |
| dc.subject | CAE | |
| dc.subject | Current comparator | |
| dc.subject | Sigma-delta | |
| dc.title | Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool | en |
| dc.type | journal article | |
| degois.publication.firstPage | ||
| degois.publication.issue | 4 | |
| degois.publication.lastPage | ||
| degois.publication.title | Bulletin of the Polish Academy of Sciences: Technical Sciences | |
| degois.publication.volume | 63 | |
| dspace.entity.type | Publication | |
| rcaap.rights | openAccess |
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