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Projeto de investigação
Fully Oxide-based Zero-Emission and Portable Energy Supply
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Architecture engineering as a route to enhance performance, stability and reproducibility of oxide TFTs
Publication . Ferreira, Tomás Afonso Carmelo; Martins, Jorge; Barquinha, Pedro
InGaZnO (IGZO) thin-film transistors (TFTs) have gained significant traction in the dis-
play industry due to their excellent electrical performance and adaptability to flexible sub-
strates. This versatility has opened doors to innovative applications like smart surfaces for
health monitoring, wearables, and radiation security. However, since these substrates require
low thermal budgets (< 180 °C), these TFTs often encounter higher defect densities, necessitat-
ing enhancements in device performance and stability.
In this context, the objective of this work centers on dual-gate (DG) TFTs, aiming to
achieve superior mobility, precise threshold voltage control, and improved stability and uni-
formity. These goals are pursued through a concept called bulk accumulation (BA), which can
occur in DG TFTs when the semiconductor layer is sufficiently thin. While the devices could
not be fabricated due to unforeseen circumstances with lab equipment, the research was pro-
pelled by technology computer-aided design (TCAD) simulation tools to gain insights into the
structural changes and material behaviors within the TFTs.
The results show that DG TFTs display increased drain currents and field-effect mobil-
ity, and lower threshold voltage and subthreshold swing. The devices also benefit from in-
creased resistance against semiconductor/dielectric interface defects, which are very promi-
nent in TFTs and decisive in their electrical performance. This is because of the occurrence of
BA, in which carrier accumulation occurs not only at semiconductor/dielectric interfaces but
also in the bulk of the active layer. The results also suggest that this effect is more noticeable
at higher interface defect densities, since the TFT is more reliant on the bulk contributions for
its electric performance. These structures could be used as a way to impose an electrical per-
formance boost on TFTs with high interface defects, using BA to avoid these imperfections.
Oxide TFTs with high mobility and stability through multi-layer semiconductors
Publication . Laranjeira, Tiago Josué Brás de Castro; Barquinha, Pedro; Martins, Jorge
As the market of flexible electronics continues to grow, it is imperative to find transistor
technologies that enable good electrical performance and mechanical reliability, without
neglecting low cost, low temperature, and large-area fabrication. Upcoming applications
in complex flexible circuitry demand significant improvements in both device stability and
mobility. One of the methods being researched to accomplish this is to use semiconductor
layer engineering. In this study, a dual-active layer architecturewas explored in a staggered,
bottom gate TFT configuration, consisting of a highly conductive thin film on the bottom,
with a less conductive thin film on top.
The first part of this work focused on the optimization of IZO thin films, fabricated by
co-sputtering with In2O3 and ZnO targets, aiming towards high Hall mobility and charge
carrier concentration, achieving 21.5 cm2·V−1·s−1 and 1.18 × 1020 cm−3 for each parameter,
respectively, at an annealing temperature of 180 °C.
In the second part of this work, the DAL TFTs were fabricated utilizing the optimized
IZO as the highly conductive layer, and either a less conductive IZO layer or an IGZO
layer as the less conductive one. The DAL devices that incorporated only IZO layers were
found to be too conductive, but when implementing IGZO in the structure there were
mobility improvements from 2.0 to 18.4 cm2·V−1·s−1 compared to IGZO only TFTs, which
resulted in faster devices. Furthermore, a comparison was made between the annealing
temperatures of 180 °C and 300 °C, and it was concluded that the lower temperature
yielded better device performance, a desirable characteristic for smaller thermal budgets.
An ultra-low power wake-Up timer compatible with n-FET based flexible technologies
Publication . Narbón, D.; Soler-Fernández, J. L.; Santos, A.; Barquinha, P.; Martins, R.; Diéguez, A.; Prades, J. D.; Alonso, O.; CENIMAT-i3N - Centro de Investigação de Materiais (Lab. Associado I3N); DCM - Departamento de Ciência dos Materiais; Nature Publishing Group
Flexible integrated circuits (FlexICs) have drawn increasing attention, particularly in remote sensors and wearables operating in a limited power budget. Here, we present an ultra-low power timer designed to wake-up an external circuit periodically, from a deep-sleep state into an active state, thereby largely reducing the system power consumption. We achieved this with a circuit topology that exploits the transistor’s leakage current to generate a low frequency wake-up signal. This topology is compatible with IC technologies where only n-type transistors are available. The design was implemented with the sustainable FlexIC process of PragmatIC, that is based on Indium Gallium Zinc Oxide (IGZO) thin-film transistors. Our timer generates mean wake-up frequency of 0.24 ± 0.15 Hz, with a mean power consumption of 26.7 ± 14.1 nW. In this paper, we provide details of the Wake-Up timer’s design and performance at different supply voltages, under temperature variations and different light conditions.
Foldable and Recyclable Iontronic Cellulose Nanopaper for Low-Power Paper Electronics
Publication . Cunha, Inês; Ferreira, Sofia Henriques; Martins, Jorge; Fortunato, Elvira; Gaspar, Diana; Martins, Rodrigo; Pereira, Luís; UNINOVA-Instituto de Desenvolvimento de Novas Tecnologias; CENIMAT-i3N - Centro de Investigação de Materiais (Lab. Associado I3N); DCM - Departamento de Ciência dos Materiais; John Wiley and Sons Inc.
An increase in the demand for the next generation of “Internet-of-Things” (IoT) has motivated efforts to develop flexible and affordable smart electronic systems, in line with sustainable development and carbon neutrality. Cellulose holds the potential to fulfil such demands as a low-cost green material due to its abundant and renewable nature and tunable properties. Here, a cellulose-based ionic conductive substrate compatible with printing techniques that combines the mechanical robustness, thermal resistance and surface smoothness of cellulose nanofibrils nanopaper with the high capacitance of a regenerated cellulose hydrogel electrolyte, is reported. Fully screen-printed electrolyte-gated transistors and universal logic gates are demonstrated using the engineered ionic conductive nanopaper and zinc oxide nanoplates as the semiconductor layer. The devices exhibit low-voltage operation (<3 V), and remarkable mechanical endurance under outward folding due to the combination of the robustness of the nanopaper and the compliance of the semiconductor layer provided by the ZnO nanoplates. The printed devices and the ion-conductive nanopaper can be efficiently recycled to fabricate new devices, which is compatible with the circular economy concept.
Design and Implementation of a Programmable LDO circuit using oxide TFT technology
Publication . Barrosinho, Mariana Gomes; Barquinha, Pedro; Goes, João
This work proposes implementing a Power Management Unit (PMU) using thin film transistors (TFTs) technology for the FOXES Project's Power Cube, making it eco-friendly, autonomous, compact, and flexible. The study focuses on implementing a programmable Low Dropout (LDO) regulator using only NMOS transistors, given the exclusive use of Indium-Gallium-Zinc-Oxide (IGZO) TFTs. The system must be capable of providing three different voltages: 1.2 V, 1.8 V, and 3.3 V, regardless of the voltage supplied by the solar cell (VIN).
The LDO will be connected to an Internet of Things (IoT) bundle, requiring different operation modes for the 1.8 V and 3.3 V outputs. The 1.8 V output should supply a current between 1 mA and 9 mA, and the 3.3 V output, between 200 µA and 1 mA. The 1.2 V output will have a constant current of 500 µA.
LDOs are linear converters consisting of an OpAmp and a main branch, forming negative feedback, allowing for precise and fast outputs with low consumption, regardless of the value of VIN. Considering the IoT requirements, programmable replicas were implemented and controlled by a digital control system.
The circuit proved to be robust to process variations, with the typical corner showing a variation of less than 10% in the outputs, even with changes in VIN and current, according to the specifications. Additionally, the power dissipation was low, at 6.40 mW for a VIN of 6 V. The system layout was completed, with dimensions of 2.13 x 2.18 mm².
Thus, the proposed PMU proved to be promising for the Power Cube and other Power Management (PM) applications, due to its precise outputs, low consumption, and compact size, with room for improvement.
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Entidade financiadora
European Commission
Programa de financiamento
H2020
Número da atribuição
951774