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Orientador(es)
Resumo(s)
This paper presents design and implementation of 8-bit shift register with low-voltage amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs) for row/column selection of pixel matrix in flexible displays. This circuit is capable of ensuring complete rail-to-rail operation by employing novel NAND gates that were developed based on capacitive bootstrapping load. As a first step, a positive edge triggered D-flip flop (D-FF) is designed using these logic gates, then a complete 8-bit shift register is designed and simulated using in-house low-voltage IGZO TFT models in Cadence Virtuoso. During these circuit simulations a power supply voltage of 2V and a channel length of 2 μm were used. Simulation outcome of 8-bit shift register has shown a power consumption of 72.15 μW with output voltage swing of 95% of V dd at 20 kHz operating frequency, going well beyond the state of the art for oxide TFT technology at very low supply voltage. The proposed circuit can be used as a row/column selector in flexible displays that can operate at low supply voltage and allows small active-area.
Descrição
ECR/2017/000931
POCI-01-0145-FEDER-007688
SFRH/BD/122286/2016
ORABAC/17852
Palavras-chave
Capacitor bootstrapping IGZO TFTs Low-voltage operation Pseudo-CMOS Shift register Electrical and Electronic Engineering Instrumentation
Contexto Educativo
Citação
Editora
Institute of Electrical and Electronics Engineers (IEEE)
