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Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm
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Orientador(es)
Resumo(s)
This paper presents a framework for time-domain optimization of amplifiers employing a parallel genetic algorithm based on a message passing interface. This
methodology achieves a considerable reduction in the optimization time (up to 19 times faster than a serial implementation). Increasing the processing capacity allows
searching within a larger design space using complex transistors models, yielding more accurate results. The optimization, based on transient simulations, is possible due to
the integration of a genetic algorithm optimizer together with the open-source simulator NGSPICE source-code.
Descrição
IEEE International Symposium on Circuits and Systems, pp. 724 – 727, Seattle, EUA