Logo do repositório
 
Publicação

Planar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates

2018-12-01Artigo científico Acesso aberto
Ver registo simples
dc.contributor.authorGaspar, Diana
dc.contributor.authorMartins, Jorge
dc.contributor.authorBahubalindruni, Pydi
dc.contributor.authorPereira, Luís
dc.contributor.authorFortunato, Elvira
dc.contributor.authorMartins, Rodrigo
dc.contributor.institutionCENIMAT-i3N - Centro de Investigação de Materiais (Lab. Associado I3N)
dc.contributor.institutionDCM - Departamento de Ciência dos Materiais
dc.contributor.institutionUNINOVA-Instituto de Desenvolvimento de Novas Tecnologias
dc.contributor.pblWiley
dc.date.accessioned2019-06-05T22:21:31Z
dc.date.available2019-06-05T22:21:31Z
dc.date.issued2018-12-01
dc.descriptionproject PapEl, reference PTDC/CTM-NAN/5172/2014. PD/BD/52627/2014. SFRH/BD/122286/2016.
dc.description.abstractElectronics on paper enable some specific applications out of conventional ones which require innovative approaches and concepts on the design of devices and systems. Within this context, this work demonstrates that a unique set of characteristics can be combined in planar dual-gate oxide–based field effect transistors with a back floating electrode using paper simultaneously as substrate and dielectric. The working principle of these transistors relies on the formation of electric double layers at the semiconductor/paper and paper/back floating electrode interfaces (associated to ions displacement within the paper) that can be disturbed by a voltage applied at a secondary gate, by the back floating potential or by the combination of both. This feature allows for the control of the on-voltage of the transistors, from depletion to enhancement mode, for instance. Moreover, this specific characteristic allows the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the proper combination of the voltage level applied at each gate. This way a simple and universal device architecture can be envisaged towards the simplification of the production of low power electronic systems on paper.en
dc.description.versionpublishersversion
dc.description.versionpublished
dc.format.extent4394104
dc.identifier.doi10.1002/aelm.201800423
dc.identifier.issn2199-160X
dc.identifier.otherPURE: 11376513
dc.identifier.otherPURE UUID: 68f71b41-385d-4996-a396-b26e5a6676bf
dc.identifier.otherScopus: 85055740789
dc.identifier.otherWOS: 000452617800010
dc.identifier.otherORCID: /0000-0002-4202-7047/work/53556697
dc.identifier.otherORCID: /0000-0002-7518-0275/work/75589002
dc.identifier.urihttp://www.scopus.com/inward/record.url?scp=85055740789&partnerID=8YFLogxK
dc.identifier.urlhttps://www.scopus.com/pages/publications/85055740789
dc.language.isoeng
dc.peerreviewedyes
dc.relationinfo:eu-repo/grantAgreement/FCT/5876/147333/PT
dc.relationinfo:eu-repo/grantAgreement/EC/H2020/640598/EU
dc.relationNew era of printed paper electronics based on advanced functional cellulose
dc.relationMaterials Synergy Integration for a Better Europe
dc.relation1D Nanofibre Electro-Optic Networks
dc.relationinfo:eu-repo/grantAgreement/FCT/5876/147333/PT
dc.subjectdual-gate oxide-based field effect transistors
dc.subjectpaper electronics
dc.subjectpaper transistors
dc.subjectuniversal logic gates
dc.subjectElectronic, Optical and Magnetic Materials
dc.titlePlanar Dual-Gate Paper/Oxide Field Effect Transistors as Universal Logic Gatesen
dc.typejournal article
degois.publication.issue12
degois.publication.titleAdvanced Electronic Materials
degois.publication.volume4
dspace.entity.typePublication
oaire.awardNumberUID/CTM/50025/2013
oaire.awardNumber640598
oaire.awardNumber692373
oaire.awardNumber685758
oaire.awardTitleNew era of printed paper electronics based on advanced functional cellulose
oaire.awardTitleMaterials Synergy Integration for a Better Europe
oaire.awardTitle1D Nanofibre Electro-Optic Networks
oaire.awardURIinfo:eu-repo/grantAgreement/FCT/5876/UID%2FCTM%2F50025%2F2013/PT
oaire.awardURIinfo:eu-repo/grantAgreement/EC/H2020/640598/EU
oaire.awardURIinfo:eu-repo/grantAgreement/EC/H2020/692373/EU
oaire.awardURIinfo:eu-repo/grantAgreement/EC/H2020/685758/EU
oaire.fundingStream5876
oaire.fundingStreamH2020
oaire.fundingStreamH2020
oaire.fundingStreamH2020
project.funder.identifierhttp://doi.org/10.13039/501100001871
project.funder.identifierhttp://doi.org/10.13039/501100008530
project.funder.identifierhttp://doi.org/10.13039/501100008530
project.funder.identifierhttp://doi.org/10.13039/501100008530
project.funder.nameFundação para a Ciência e a Tecnologia
project.funder.nameEuropean Commission
project.funder.nameEuropean Commission
project.funder.nameEuropean Commission
rcaap.rightsopenAccess
relation.isProjectOfPublicationd94394ca-c419-4430-9491-83be2361e7a8
relation.isProjectOfPublication70fcfb54-5227-492e-a1dc-1abf20674a08
relation.isProjectOfPublication9e1001a6-25c9-4e1c-bd31-82c89070abe5
relation.isProjectOfPublication4a63fb9a-286d-4586-8fcb-1a23ae943f1c
relation.isProjectOfPublication.latestForDiscovery70fcfb54-5227-492e-a1dc-1abf20674a08

Ficheiros

Principais
A mostrar 1 - 1 de 1
Miniatura
Nome:
Gaspar_et_al_2018_Advanced_Electronic_Materials.pdf
Tamanho:
4.19 MB
Formato:
Adobe Portable Document Format
Ver/Abrir

Coleções

FCT: DCM - Artigos em revista internacional com arbitragem científica