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2014 - Incentive
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A Paradigm Shift in the Design of Analog Circuits Targeting Nanoscale CMOS and Large-scale TFT Technologies
Publication . Correia, Ana Paula Pinto; Goes, João; Barquinha, Pedro
Despite the strong developments in complementary metal-oxide-semiconductor (CMOS) or non-CMOS technologies such as, in oxide thin-film transistors (TFTs), their nonidealities and constraints impact on the circuits performance. This aspect is even more relevant in complex circuits, such as in analog-to-digital converters (ADCs), where the design is thorough. Then, using techniques capable to attenuate the impact of these limitations such as, negative feedback, or recurring to almost passive or digital (synthesizable and scalable) circuitry, it is possible to design outstanding ADCs in different technologies. Therefore, two ADCs were designed in this work, using two distinct technologies.
A Digital-delta-modulator (DM) with noise-shaping (NS) was designed using a deep-nanoscale CMOS technology. Employing almost passive and digital-circuitry, this topology comprises a split-capacitor 10-bit digital-to-analog converter (DAC) with embedded sample-and-hold (S/H), a pseudo-differential inverter-based switched-capacitor (SC) integrator with a fully-passive SC common mode feedback (CMFB) circuit, a single-bit comparator, an accumulator and a clock and phase generators. Simulations revealed a signal-to-noise-and-distortion ratio (SNDR) close to 74 dB, a 12-bit effective number of bits (ENOB), with a Walden figure-of-merit (FoM), FoMWalden, of 12.5 fJ/conv.-step.
Using oxide TFTs, a 2nd-order delta-sigma modulator (DSM) was designed. Given the technology limitations, an almost passive structure was considered, with a design that relied essentially on the comparator project. During schematic simulations, a SNDR close to 69 dB, corresponding to an ENOB of ≈ 11:3-bit, was achieved (FoMWalden of 40 nJ/conv.-step). After the fabrication, individual transistors were characterised but they provided completely different electrical properties from the devices used to create the simulation model. The circuits, where comparators are included, were also measured but fabrication problems were detected. Strategies to mitigate these effects are currently being implemented.
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Fundação para a Ciência e a Tecnologia
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6817 - DCRRNI ID
Número da atribuição
Incentivo/EEI/UI0066/2014