Barquinha, PedroLaw, Man-KayRodrigues, Bernardo Marques2019-12-182020-03-312019-11-192019http://hdl.handle.net/10362/90039Despite the emergence of flexible electronics as a technology for manufacturing integrated circuits at lower costs than traditional silicon microelectronics, costly and time-consuming clean room processes are still needed to interconnect the various transistors that make up the circuits. In this context, this dissertation presents an alternative, based on printing processes of multi-layer metallic interconnections, that allow to connect thin film transistors (TFTs) in functional circuit blocks, thus bringing a significant cost reduction and great flexibility for the prototype of new circuits. For such, a silver ink and polyvinylpyrrolidone (PVP) solution were used to form the conductive and insulating layer respectively. Using an inkjet printer, it was possible to pattern, on glass, silver lines with 100 and 50 μm width and a resistivity of 7.12 × 10-8 Ωm using 200 ºC for 30 min. PVP was deposited with a thickness of 3.5 μm to ensure insulation between conductive layers and a laser etching process was implemented to create vias between different metallization levels. Finally, the developed process was demonstrated in several digital circuit blocks based on oxide TFTs.engInkjetConductive inkMulti-level metallizationSilver interconnectionsSilver linesMultilevel metallization scheme using printing technologies for IC fabrication using discrete oxide TFTsmaster thesis